Motivation & Goals

The goal of this dissertation work is to design, develop and test an Ultra-WideBand (UWB) system based on programmable logic, in particular, an FPGA. The result will be a short range IR-UWB communications device that can perform ranging measurements and also operate as a transceiver.

From the beginning it was accepted that it would be difficult to offer the same level of high bandwidth and data-rates usually associated with UWB on a newly developed architecture to be applied in low-cost FPGAs instead the typical CMOS Application Specific Integrated Circuits (ASICs). Nevertheless, the main purpose of the work would be satisfied with the delivery of a proof-of-concept design that could demonstrate UWB concepts on FPGA hardware for both intended applications.

The main motivation for the work was the challenge of developing a lower-cost and non-ASIC
alternative to currently existing custom CMOS designs of UWB applications, ideally offering tens of Mbit/s performance for short-range communications, and also ranging measurements in the range of tens of centimetres. This would be made possible by designing an UWB architecture in Hardware Description Language (HDL), both for the receiver and transmitter chains, that would be compatible with common FPGA chips, as opposed to ASIC-based systems witch are typically more expensive to develop and deploy.